Keysight M8040A Bit Error Rate Tester
The Keysight M8040A Bit Error Rate Tester (BERT) is highly integrated for physical layer characterization and compliance testing. With support for pulse amplitude modulation 4-level (PAM-4), non-return-to-zero (NRZ) signals, and symbol rates up to 64 Gbaud (corresponds to 128 Gbit/s), the Keysight M8040A covers all aspects of the emerging 400/200 GbE and CEI-56G standards. The M8040A BERT true error analysis feature provides repeatable and accurate results -- optimizing the performance margins of your devices.
The Keysight M8040A is designed for R&D and test engineers who characterize chips, devices, transceiver modules and sub-components. This Keysight Bit Error Rate Tester is also modeled for boards and systems with serial I/O ports operating with symbol rates up to 32 Gbaud and 64 Gbaud in the data center and communications industries.
Modules | M8045A | M8046A |
---|---|---|
Power requirements (module only) | Single channel: 515 W Dual channel: 605 W |
238 W |
Physical dimensions for modules (W x H x D) | 3-slot AXIe module: 351 x 92 x 315 mm (13.8 x 3.6 x 12.4 inch) | 1-slot AXIe module: 351 x 30 x 309 mm (13.8 x 1.8 x 12.2 inch) |
Physical dimensions for M8040A-BU1/-BU2 (W x H x D) | Installed in 5-slot AXIe chassis: 462 x 193 x 446 mm (18.2 x 7.6 x 17.6 inch) | Installed in 5-slot AXIe chassis: 462 x 193 x 446 mm (18.2 x 7.6 x 17.6 inch) |
Weight net | M8045A module: single channel 6.9 kg (15.2 lb) M8045A dual channel: 7.5 kg (16.5 lb) With M8040A-BU1: 25 kg (55 lb) With M8040A-BU2: 21 kg (46.3 lb) | M8046A module: 3.6 kg (8.0 lb) In bundle with M8045A and in a 5-slot chassis: 24.6 kg (54.3 lb) |
- Data rates from 2 to 32 and 64 Gbaud
- PAM-4 and NRZ selectable from user interface
- Built-in 4 tap de-emphasis to compensate loss
- Integrated and calibrated jitter injection: RJ, PJ1, PJ2, SJ, BUJ, and clk/2 jitter
- Two pattern generator channels per module to emulate aggressor lane
- Linearity tests with adjustable PAM-4 levels
- Short connections to the DUT with remote heads for the pattern generator
- True PAM-4 error detection in real-time for low BER levels
- Graphical user interface and remote control via M8000 system software
- Scalable and upgradeable with options and modules
- Proprietary interfaces for chip-to-chip, chip-to-module, backplanes, repeaters, and active optical cables, operating up to 64 Gbaud.
- IEEE 802.3bs 400 and 200 Gigabit Ethernet (200GAUI, 200GBASE, 400GAUI, 400GBASE)
- IEEE 802.3bj 100 Gigabit Ethernet
- IEEE 802.3cd 50, 100 and 200 Gigabit Ethernet
- OIF CEI - 56G (NRZ and PAM-4 versions)