Keysight 1671D-30 Logic Analyzer
Discontinued
- State and timing channels: 102/51
- State/timing memory depth
Standard depth: 64 samples on all channels, 128K samples on half channels
Optional depth: 500K samples on all channels, 1000K samples on half channels (state analysis depth is halved when time tags are turned on) - Setup/hold time: 3.5/0 ns to 0/3.5 ns adjustable in 500-ps increments
- State analysis speed: 70 MHz in all modes
- Timing analysis modes and speeds:
Conventional: 125 MHz on all channels, 250 MHz on half channels - Probe input R & C: 100k ohms and ~ 8 pF
- Trigger resources: Patterns: 10; Edge and glitch terms: 2; Ranges: 2; Timers: 2
- Trigger sequence levels: 12 with state analysis and 10 with timing analysis
- Trigger macros: 23 predefined trigger sequences with graphical representations and plain language descriptions
- Mass storage: Hard disk drive and 1.44 MB flexible disk drive
- Ethernet LAN interface: Standard equipment; twisted pair and coaxial connectors
- OS Boot Method: Flash ROM